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Δημοσιεύσεις σε επιστημονικά περιοδικά:
- J. Vourvoulakis, J. Kalomiros, J. Lygouras, FPGA-based architecture of a real-time SIFT matcher and RANSAC algorithm for robotic vision applications, Multimed. Tools Appl. 77 (2018) 9393–9415. doi:10.1007/s11042-017-5042-x.
- J. Vourvoulakis, J. Kalomiros, J. Lygouras, FPGA accelerator for real-time SIFT matching with RANSAC support, Microprocess. Microsyst. 49 (2017) 105–116. doi:10.1016/j.micpro.2016.11.011.
- J. Vourvoulakis, J. Kalomiros, J. Lygouras, Fully pipelined FPGA-based architecture for real-time SIFT extraction, Microprocess. Microsyst. 40 (2016) 53–73. doi:10.1016/j.micpro.2015.11.013.
- J. Vourvoulakis, J., Kalomiros, J., & Lygouras, Design details of a low cost and high performance robotic vision architecture, Int. J. Comput. 14 (2015) 141–156. http://computingonline.net/index.php/computing/article/view/813.
Δημοσιεύσεις σε επιστημονικά συνέδρια:
- J. Vourvoulakis, J. Kalomiros, J. Lygouras, A complete processor for SIFT feature matching in video sequences, in: 2017 9th IEEE Int. Conf. Intell. Data Acquis. Adv. Comput. Syst. Technol. Appl., IEEE, 2017: pp. 95–100. doi:10.1109/IDAACS.2017.8095057.
- J. Vourvoulakis, J. Lygouras, J. Kalomiros, Acceleration of RANSAC algorithm for images with affine transformation, in: 2016 IEEE Int. Conf. Imaging Syst. Tech., IEEE, 2016: pp. 60–65. doi:10.1109/IST.2016.7738198.
- J. Vourvoulakis, J. Lygouras, J. Kalomiros, Hardware implementation of an optimized scale-invariant feature detector for robotic applications, in: IST 2014 - 2014 IEEE Int. Conf. Imaging Syst. Tech. Proc., 2014: pp. 226–231. doi:10.1109/IST.2014.6958478.
- J.V. Vourvoulakis, J. Lygouras, J.A. Kalomiros, Acceleration of image processing algorithms using minimal resources of custom reconfigurable hardware, in: Proc. 2012 16th Panhellenic Conf. Informatics, PCI 2012, 2012: pp. 68–73. doi:10.1109/PCi.2012.11.
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